DFT Verification Engineer / 3 - 10 Years / Bangalore


Posted 04 Jul 2017 (569 days ago)

Job Description

Our client is looking for expert DFT engineers for development, support, maintenance, Implementation and Testing of complex components of an ATPG,Fastscan,FPGA,Board.
DFT Verification Engineer must have mandatory experience on Scan insertion and ATPG using Fastscan, TestKompress, DFTCompiler, DFTMax, DFTAdvisor , TetraMax.
Pattern Simulation with and without timing annotation & debugging.
Scan Insertion, ATPG, Memory BIST, MBIST, Bscan, Vtran,Simutest.
JTAG, MBIST, Scan Compression, ATPG, Fault Simulation and at-speed testing.
Candidate must know Synopsys Tetramax.
Cadence Encounter Test
Mentor Fastscan
Simulation tools VCS, Modelsim.
Tools (DC,RC, Tk,Tmax, Virage,Mentor memory BIST, Mentor Bscan).

Desired Candidate

Candidate must know Scripting skills (TCL,Perl).
Must know Formal verification tools such Verplex, Formality.
Silicon bring-up.
Candidate should know Industry tools such as Vera, Spyglass, 0-in, Jasper, RedHawk, PrimePower.
Timing closure and industry tools like PrimeTime and PTSI.
Candidate should know Team Lead exposure and taking ownership of design deliverance.
Must take primary responsibilities will include driving the DFT implementation and verification.
Define SCAN, MBIST, LBIST, JTAG architecture to meet highly aggressive test targets.
Must know Coding DFT RTL and validating through formal verification.
Hands on execution on scan insertion, ATPG bring up and coverage analysis.
Must define and support TEST mode STA constraints.
MBIST implementation and verification.
Generating high quality manufacturing ATPG test patterns for (SAF) stuck-at.
Simulating and verifying the ATPG (SAF, TDF) and MBIST patterns on unit delay and timing corners.
Must work cross sites with design team to define and implement DFT.
Candidate must be expertise in handling Mentor Graphics EDT logic.
Candidate must have good knowledge in Digital Logic Design.
Good understanding of Verilog HDL
Should know the Basics of static timing Analysis.
Should have strong analytical and problem solving skills.
Strong coding skills in industry standard scripting languages.
Must have extraordinary written and oral communication skills with the curiosity to work on rare challenges.
Under Graduate :Any Graduate - Any Specialization, B.Tech/B.E. - Any Specialization, Electrical, Electronics/Telecommunication
Post Graduate:Any Postgraduate - Any Specialization, M.Tech - Any Specialization, Electrical, Electronics/Telecommunication
Doctorate:Doctorate Not Required

Key Skills

DFT Verification with ATPG, Fastscan



Employment Type

Full Time

Job Function


Experience Required

3 - 10 Years

No Of Positions

Salary Offered

INR 600000 - 1500000

Interview Locations

Client Location - Not Mentioned(Interview Mode - Face 2 Face)

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