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IP/SOC/UVM Verification / 3 - 5 Years / Bangalore

Bangalore

Posted 19 May 2017 (152 days ago)


Job Description

Candidate must know general Skills in Verification.
Must work with Design Engineers in verification and validation of circuit designs.
Develop design standards and guidelines to ensure quality and performance.
Must perform layout, logical, design, feasibility, and electrical verification of circuit components.
Should participate in design reviews and recommend improvements.
Perform failure analysis and suggest corrective actions.
Must work with management to coordinate and execute projects within allotted timelines and budget.
Should determine technology requirements, dependencies and deliverables based on project specifications.
Must prepare design verification plan based on design specifications.
Candidate must plan and schedule assigned projects for timely completion.
They should utilize latest techniques, tools and technologies for design verification activities.
Should maintain design verification environment and track and close design bugs.
Develop design verification methodologies and implement standard debug flows.
Candidate must plan and schedule assigned projects for timely completion.
They should utilize latest techniques, tools and technologies for design verification activities.
Should maintain design verification environment and track and close design bugs.
Develop design verification methodologies and implement standard debug flows.

Desired Candidate

Skills : Verilog, System Verilog Methodology: UVM (preferred), OVM, VMM. Knowledge of scripting (Perl, C-shell) SVA will be a plus.
Must have good general verification experience with good academy result. 
Must Have: SoC or IP Experience Languages: System Verilog. Methodologies: OVM/UVM/VMM DDR/USB/Ethernet/PCIE/Video/HDMI/MIPI/DSI/CSI.
Candidate must participate in design reviews and recommend improvements.
Perform failure analysis and suggest corrective actions.
Candidate should work with management to coordinate and execute projects within allotted timelines and budget.
Candidate should have good command on English both in written and spoken.
Should have Positive attitude, social skills, a desire to help team members, structured way of working and an eye for quality work.
Familiarity with scripting languages.
Localization of bugs: finding bugs easily
Easier to test all the block modes at the block-level
Confidence in the block-level allowing them to be reused in several projects.
Methodology: UVM (preferred), OVM, VMM.
Knowledge of scripting (Perl, C-shell)
SVA will be a plus
Good general verification experience with good academy result.
Must Have:
SoC or IP Experience Languages: System Verilog
Methodologies: OVM/UVM/VMM DDR/USB/Ethernet/PCIE/Video/HDMI/MIPI/DSI/CSI
Candidate must have good general verification experience with good academy result.


Key Skills

UVM, OVM, VMM,Perl, C-shell, SVA, SoC, Verilog, DDR


Industry

Semiconductors

Employment Type

Full Time

Job Function

Engineering


Experience Required

3 - 5 Years


No Of Positions


Salary Offered

INR 500000 - 900000


Interview Locations

Client Location - Not Mentioned(Interview Mode - Face 2 Face)


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