RTL Design Engineer / 2 - 3 Years / Bangalore


Posted 13 Jan 2017 (738 days ago)

Job Description

• RTL Design for High Performance Computing Platform • Algorithm development for FPGA based implementation • Verification of FPGA based Design, writing test benches, test cases. • System Integration & Testing Must Requirements – • Understanding of FPGA architecture • Experience in Logic design / micro-architecture / RTL coding • Expertise in Verilog / VHDL Hardware description language(s) • Hands on experience in Multi Clock designs, Asynchronous interface • Experience in designing with Xilinx / Altera / Actel FPGAs • Prior understanding of standard protocols such as AXI, AHB, Avalon Interface (Altera) etc. • Develop FPGA Design Verification tests and test plans • Excellent communication skills • Good problem solving skills and analytical ability Desirable Requirements – • Prior experience in architecting and developing constrained random verification environment using System Verilog. • Hands-on experience with test equipment and lab debug • Expertise in FPGA RTL Verification • Execution of test plan, debugging failures, write functional coverage objects and review the code coverage and function coverage with design team. • Understanding of Networking protocols like TCP, UDP will be an added advantage • Programming in scripting languages like TCL and Perl. • Prior experience in high speed serial protocols such PCIE and 10G Ethernet. • Experience with Integration of IP cores – MAC, PCIe, DDR Memory, USB, PLL • Exposure to formal verification methodologies. • Prior experience in bringing up gate level simulation and debugging issues. • Work with IP vendors and Design engineers to resolve bugs. • Ability to interface with other disciplines, including RTL/Logic, hardware design, and firmware engineers.

Key Skills



Employment Type

Full Time

Job Function


Experience Required

2 - 3 Years

No Of Positions

Salary Offered

INR 500000 - 700000

Interview Locations

Client Location - Bangalore(Interview Mode - Face 2 Face)

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