RTL Integration / 3 - 10 Years / Bangalore


Posted 19 May 2017 (207 days ago)

Job Description

Verilog/VHDL RTL/Conformal Verification(LEC) Synthesis (DC) Spyglass (lint, DFT, PM, CLK/RST) SoC integration flows (integrating multiple IPs and associated, Understanding of Power Management (voltage domain, power domains, clock domains) OCP and AXI protocols ARM understanding Misc.: Debussy, simulators (mti/ncsim), Perl.

Key Skills

Verilog, LEC, DC, lint, DFT, PM, CLK, SOC, OCP, AXI, ARM, Debussy, Simulators, Perl


Information Technology And Services

Employment Type

Full Time

Job Function

Information Technology

Experience Required

3 - 10 Years

No Of Positions

Salary Offered

INR 500000 - 1200000

Interview Locations

Client Location - Not Mentioned(Interview Mode - Face 2 Face)

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