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Sr DV Engineer/HW (MAC expertise) / 7 - 11 Years / Bangalore

Bangalore

Posted 24 Feb 2018 (236 days ago)


Job Description

Design Verification group of Chelsio communications, market and technology leader enabling the convergence of networking, storage and clustering traffic over high speed Ethernet, is looking for highly skilled verification engineers to verify the ASIC.

-              They will be responsible to develop test environment and tests to verify various Networking protocols on sub-system and system level environments.

-              Develop detailed test plans and execute the testplan,

-              Develop block and system-level test benches and verification environments; achieve complete coverage to ensure first working silicon.

-              Adding functional coverage for the environment.

-              Develop the required scripts and maintain throughout the project.

 

Requirement:

-              Strong programming experience using system Verilog with UVM/VMM/OVM methodology.

-              Must have worked on high speed (1G-400G) MAC/PCS/PMA verification

-              Must have thorough understanding of Ethernet standards , auto neg, FEC etc

-               Must have hands on experience building complex verification environment

-               Must have worked with some of the industry standard VIPs ,  Exp on Synopsys VIP preferred

-             Networking protocol knowledge, PCIE/DDR/MAC experience is a plus.

-             Experience on PLI/VPI is a plus.


Desired Candidate

Design Verification group of Chelsio communications, market and technology leader enabling the convergence of networking, storage and clustering traffic over high speed Ethernet, is looking for highly skilled verification engineers to verify the ASIC.

-              They will be responsible to develop test environment and tests to verify various Networking protocols on sub-system and system level environments.

-              Develop detailed test plans and execute the testplan,

-              Develop block and system-level test benches and verification environments; achieve complete coverage to ensure first working silicon.

-              Adding functional coverage for the environment.

-              Develop the required scripts and maintain throughout the project.

 

Requirement:

-              Strong programming experience using system Verilog with UVM/VMM/OVM methodology.

-              Must have worked on high speed (1G-400G) MAC/PCS/PMA verification

-              Must have thorough understanding of Ethernet standards , auto neg, FEC etc

-               Must have hands on experience building complex verification environment

-               Must have worked with some of the industry standard VIPs ,  Exp on Synopsys VIP preferred

-             Networking protocol knowledge, PCIE/DDR/MAC experience is a plus.

-             Experience on PLI/VPI is a plus.


Company Description

It is a privately-held company headquartered in Sunnyvale, California with a design center located in Bangalore, India. It is a market and technology leader enabling the convergence of networking, storage and clustering traffic over high speed Ethernet. With the proliferation of massive data centers, equipment density and power consumption are more critical than ever. At the same time cloud computing and server virtualization are driving the need for more uniform designs than the traditional data-center architectures can offer. With its proven Terminator ASIC technology designed in more than 200 OEM platforms and the successful deployment of more than 400,000 ports, it has enabled unified wire solutions for LAN, SAN and cluster traffic. With its unique ability to fully offload TCP, iSCSI and iWARP protocols on a single chip, adapter cards unburden communications responsibilities and processing overhead from servers and storage systems, resulting in a dramatic

Key Skills

(1G-400G) MAC/PCS/PMA verification, Ethernet standards , auto neg, FEC, VIPs Exp on Synopsys VIP


Industry

Information Technology And Services

Employment Type

Full Time

Job Function

Not Mentioned


Experience Required

7 - 11 Years


No Of Positions


Salary Offered

INR 2500000 - 3600000


Interview Locations

Client Location - Not Mentioned(Interview Mode - Face 2 Face)


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