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Verification Engineer / 5 - 8 Years / Bangalore

Bangalore

Posted 22 Jun 2017 (29 days ago)


Job Description

Verification Engineer:

Design concepts, Knowledge of system-level architecture including buses like AXI/AHB, bridges, memory controllers such as DDR3/DDR4/LPDDR3

Strong working knowledge of UNIX environment and scripting languages such as Perl or Python, Excellent waveform debug skills using front end industry standard design tools like VCS, NCSIM, Verdi, ModelSim

Experience using UNIX Revision Control tools - Subversion, RCS, CVS, Perforce and bug tracking tools such as Bugzilla

Experience in verifying multimillion gate chip designs from specifications to tape-out.

SVA would be an added advantage.

Minimum 5+ years experience in ASIC Design Verification, with knowledge of Computer Architecture.

Experience in any computer architecture such as x86 or ARM domain based SOCs/Cores is a plus.

Must have excellent knowledge of design & verification flows.

Excellent hands-on debug skills

Any Verification methodology involving OOPs concepts C++, OVM/UVM Methodology knowledge and experience is a plus.

Strong Verilog, System Verilog, PLI/DPI interface, SystemC or C/C++, Perl/shell script programming skills.

Must have good communication skills and the ability and desire to foster a team environment.

Desired Candidate

Verification Engineer:


Design concepts, Knowledge of system-level architecture including buses like AXI/AHB, bridges, memory controllers such as DDR3/DDR4/LPDDR3


Strong working knowledge of UNIX environment and scripting languages such as Perl or Python, Excellent waveform debug skills using front end industry standard design tools like VCS, NCSIM, Verdi, ModelSim


Experience using UNIX Revision Control tools - Subversion, RCS, CVS, Perforce and bug tracking tools such as Bugzilla.


Experience in verifying multimillion gate chip designs from specifications to tape-out.


SVA would be an added advantage.


Minimum 5+ years experience in ASIC Design Verification, with knowledge of Computer Architecture.

Candidate must have experience in any computer architecture such as x86 or ARM domain based SOCs/Cores is a plus.

Must have excellent knowledge of design & verification flows.

Candidate must have excellent hands-on debug skills

Any Verification methodology involving OOPs concepts C++, OVM/UVM Methodology knowledge and experience is a plus.


Key Skills

DDR3/DDR4/LPDDR3, NCSIM, Verdi, ModelSim, C++, OVM, UVM, SystemC


Industry

Semiconductors

Employment Type

Full Time

Job Function

Engineering


Experience Required

5 - 8 Years


No Of Positions


Salary Offered

INR 1200000 - 1800000


Interview Locations

Client Location - Not Mentioned(Interview Mode - Face 2 Face)


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