Verification Engineer / 2 - 4 Years / Hyderabad,Bangalore


Posted 31 May 2017 (603 days ago)

Job Description

Verification Engineers with expertise in IP/SOC and hands-on experience in SV, UVM. Solid expertise in Verilog, SystemVerilog. Verification Methodologies UVM (preferred), OVM, VMM. Knowledge of scripting (Perl, C-shell), SVA will be a plus. Experience in leading verification closure of complex IP/SOC for at least one project. Good debugging and problem solving skills. Good communication skills and ability and desire to work as a team player.

Key Skills

IP, SV, UVM,SOC verification



Employment Type

Full Time

Job Function


Experience Required

2 - 4 Years

No Of Positions

Salary Offered

INR 400000 - 1000000

Interview Locations

Client Location - Not Mentioned(Interview Mode - Face 2 Face)

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