morgenall-logo

Verification Engineer / 2 - 4 Years / Hyderabad,Bangalore

Hyderabad,Bangalore

Posted 31 May 2017 (142 days ago)


Job Description

Verification Engineers with expertise in IP/SOC and hands-on experience in SV, UVM. Solid expertise in Verilog, SystemVerilog. Verification Methodologies UVM (preferred), OVM, VMM. Knowledge of scripting (Perl, C-shell), SVA will be a plus. Experience in leading verification closure of complex IP/SOC for at least one project. Good debugging and problem solving skills. Good communication skills and ability and desire to work as a team player.

Key Skills

IP, SV, UVM,SOC verification


Industry

Semiconductors

Employment Type

Full Time

Job Function

Engineering


Experience Required

2 - 4 Years


No Of Positions


Salary Offered

INR 400000 - 1000000


Interview Locations

Client Location - Not Mentioned(Interview Mode - Face 2 Face)


Also Matched Jobs


Technical Lead - C++

Bangalore,India

Posted 16 Oct 2017(4 days ago)


RELATIONSHIP MANAGER EQUITY ADVISOR

Bangalore,India

Posted 13 Oct 2017(7 days ago)


Project Manager / Lead- SOC verification

Bangalore,India

Posted 22 Sep 2017(28 days ago)


Wi-Fi Linux Host Software Engineer

Bangalore,India

Posted 19 Sep 2017(31 days ago)


C++ Software Developer

Bangalore,India

Posted 19 Sep 2017(31 days ago)